Introduction to Computer Architecture
Computer architecture describes the design and working structure of a computer system. It explains how the processor, memory, input/output devices, and other hardware components are organized and how they work together to execute programs.
Whenever we run a program, the computer has to fetch instructions, understand what those instructions mean, perform the required operation, and store or display the result. Computer architecture helps us understand what happens inside the computer during this process.
Computer Architecture vs Computer Organization
The terms computer architecture and computer organization are closely related, but they describe different aspects of a computer system. Architecture is mainly concerned with features visible to a programmer, while organization describes how those features are implemented using hardware.
| Computer Architecture | Computer Organization |
|---|---|
| Describes what the computer system does | Describes how the system implements those functions |
| Focuses on programmer-visible features | Focuses on hardware implementation details |
| Includes instruction sets and addressing modes | Includes control signals, hardware units and interconnections |
| Defines the functional behavior of the system | Explains how the hardware is arranged to provide that behavior |
Basic Structure of a Computer
Although computers can be designed in many different ways, most computer systems contain a processor, memory, input/output components, and communication paths between these units. Each component has a specific role, but the computer works properly only when these components cooperate.
Major Components
- Central Processing Unit (CPU): Executes instructions and performs calculations and logical operations.
- Memory Unit: Stores programs, instructions, and data that are currently being used.
- Input/Output Devices: Allow the computer to communicate with users and external devices.
- System Interconnection: Provides communication between the CPU, memory, and I/O components.
Von Neumann Architecture
The Von Neumann model is one of the most important concepts in computer architecture. In this model, instructions and data are stored in the same main memory and use a common communication path.
When a program runs, the processor fetches an instruction from memory, decodes it, executes it, and then continues with the next instruction. This basic process is commonly described as the fetch-decode-execute cycle.
Basic Computer Structure
CPU ↔ Main Memory ↔ Input/Output Devices
These components communicate through system interconnections such as buses.
Harvard Architecture
Harvard architecture keeps instruction memory and data memory separate. It can also use separate paths for accessing instructions and data. Because the two can be accessed independently, instruction fetching and data access can occur at the same time in suitable designs.
| Von Neumann Architecture | Harvard Architecture |
|---|---|
| Instructions and data share the same memory | Instructions and data use separate memories |
| Common path may be used for instruction and data transfers | Separate paths can allow simultaneous instruction and data access |
| Simple and flexible memory arrangement | Can provide higher memory access parallelism |
CPU Organization
The Central Processing Unit, or CPU, is responsible for executing program instructions. It receives instructions, processes the required data, and produces results. Modern processors are much more complex than the simplified model below, but these components provide a useful starting point for understanding CPU organization.
Main Components of the CPU
- Control Unit (CU): Coordinates the activities of the processor and generates the control signals required to carry out instructions.
- Arithmetic Logic Unit (ALU): Performs arithmetic operations such as addition and subtraction and logical operations such as AND, OR and comparison.
- Registers: Small and very fast storage locations inside the processor used to hold instructions, addresses, data, and intermediate results.
- CPU Interconnections: Provide communication between the different internal components of the processor.
Important CPU Registers
Registers are much faster to access than main memory. Different registers are used for different purposes during instruction execution.
- Program Counter (PC): Contains the address of the next instruction to be fetched.
- Instruction Register (IR): Holds the instruction currently being decoded or executed.
- Memory Address Register (MAR): Holds the address of a memory location involved in a memory operation.
- Memory Data Register (MDR): Holds data being transferred to or from memory. Older textbooks may also use the term Memory Buffer Register (MBR).
- Accumulator: A register traditionally used to hold intermediate or arithmetic results in certain processor designs.
Instruction Cycle
Before moving to instruction sets and addressing modes, it is useful to understand how a processor handles an instruction. The processor repeatedly goes through a sequence commonly called the instruction cycle.
Basic Steps
- Fetch: The CPU uses the Program Counter to locate the next instruction in memory.
- Decode: The control unit interprets the instruction and determines what operation is required.
- Execute: The processor performs the required operation.
- Store: The result may be written to a register or memory, depending on the instruction.
After completing the instruction, the processor continues with the next instruction. Branch and jump instructions can change the normal sequence by modifying the program counter.
Instruction Sets
An Instruction Set Architecture (ISA) defines the instructions and programmer-visible behavior supported by a processor. It forms an important boundary between software and hardware.
Instruction Format
An instruction generally contains an operation code and information about the operands. The exact format depends on the processor architecture.
- Opcode: Specifies the operation that the processor should perform.
- Operands: Specify the data, registers, or memory locations involved in the operation.
CISC and RISC
CISC and RISC are two broad approaches to instruction-set design. Modern processors can have characteristics that do not fit perfectly into a simple textbook comparison, but the following table is useful for understanding the basic idea.
| CISC | RISC |
|---|---|
| Traditionally provides a large and feature-rich instruction set | Traditionally uses a smaller set of simpler instructions |
| Instructions may perform relatively complex operations | Instructions generally perform simpler operations |
| May support many addressing modes | Usually uses fewer and simpler addressing modes |
| Instruction formats can be more complex | Instruction formats are often designed for simpler decoding |
| Example: x86 family | Examples: ARM and MIPS |
Addressing Modes
Addressing modes describe how an instruction identifies the operand it needs. Different addressing modes provide different ways of locating data, either directly in the instruction, in a register, or in memory.
Common Addressing Modes
- Immediate Addressing: The operand value is included directly in the instruction. For example, an instruction may specify that a value such as 10 should be added.
- Direct Addressing: The address field of the instruction identifies the memory location containing the required operand.
- Indirect Addressing: The address information identifies a location that contains the address of the actual operand.
- Register Addressing: The operand is stored in a processor register.
- Register Indirect Addressing: A register contains the memory address of the operand.
- Indexed Addressing: The effective address is calculated using a base address together with an index value or register.
- Relative Addressing: The effective address is calculated relative to the current value of the Program Counter or another specified reference point.
Instruction Pipelining
Instruction pipelining is a technique used to improve processor throughput by overlapping different stages of multiple instructions. Instead of waiting for one instruction to completely finish before starting the next one, different instructions can occupy different pipeline stages at the same time.
Common Pipeline Stages
- Instruction Fetch (IF): The processor fetches the instruction from memory.
- Instruction Decode (ID): The instruction is decoded and required registers are identified or read.
- Execute (EX): The required arithmetic, logical, or other operation is performed.
- Memory Access (MEM): Memory is accessed when the instruction requires a load or store operation.
- Write Back (WB): The result is written back to the appropriate register.
Pipeline Hazards
Pipelining improves throughput, but instructions cannot always move through the pipeline without interruption. Situations that prevent the ideal flow are called pipeline hazards.
- Structural Hazard: Occurs when two pipeline stages need the same hardware resource at the same time.
- Data Hazard: Occurs when an instruction depends on data produced by an earlier instruction that has not completed its required stage.
- Control Hazard: Occurs when a branch or jump changes the flow of instructions that the processor has already started fetching.
Memory Hierarchy
A computer uses several types of storage because no single memory technology can provide maximum speed, maximum capacity, and minimum cost at the same time. Memory hierarchy arranges these storage levels according to factors such as speed, capacity, and cost.
Major Levels of Memory Hierarchy
- Registers: Very small and extremely fast storage located inside the processor.
- Cache Memory: Fast memory that keeps frequently or recently used data and instructions closer to the CPU.
- Main Memory (RAM): Stores programs and data that are actively being used by the computer.
- Secondary Storage: Provides larger and persistent storage through devices such as SSDs and HDDs.
Memory Hierarchy
Registers → Cache → Main Memory (RAM) → Secondary Storage
Moving downward generally means greater capacity and lower cost per bit, but also longer access time.
Locality of Reference
Programs often show patterns in the way they access memory. This behavior is called locality of reference and is one of the reasons cache memory works effectively.
- Temporal Locality: If a program accesses a piece of data, it is likely to access the same data again in the near future.
- Spatial Locality: If a program accesses one memory location, it is often likely to access nearby memory locations soon.
Cache Memory
Cache memory is a small and fast memory located close to the processor. It stores copies of data and instructions that the CPU is likely to use again. By reducing the number of accesses to slower main memory, cache can improve overall processor performance.
Cache Mapping Techniques
- Direct Mapping: Each block of main memory can be placed in one specific cache location.
- Fully Associative Mapping: A memory block can be placed in any available cache location.
- Set-Associative Mapping: The cache is divided into sets, and a memory block can be placed in one of the locations within its assigned set.
Cache Performance Terms
- Cache Hit: The requested data is found in the cache.
- Cache Miss: The requested data is not found in the cache and must be obtained from another level of memory.
- Hit Rate: The percentage of memory accesses that are successfully served by the cache.
- Miss Rate: The percentage of memory accesses that are not found in the cache.
- Hit Time: The time required to access data when it is available in the cache.
- Miss Penalty: The additional time required to obtain the requested data after a cache miss.
Input/Output Organization
Input/output organization deals with the way a processor communicates with external devices such as keyboards, storage devices, displays, network interfaces, and other peripherals.
I/O Transfer Methods
- Programmed I/O: The CPU is responsible for controlling the I/O operation and checking the device status.
- Interrupt-Driven I/O: The device can notify the CPU through an interrupt when it needs attention or when an operation has completed.
- Direct Memory Access (DMA): A DMA controller can transfer blocks of data between an I/O device and main memory with limited CPU involvement.
I/O Registers
- Data Register: Holds data being transferred between the CPU or memory and the device.
- Status Register: Contains information about the current state of the device.
- Control Register: Stores commands or control information used to operate the device.
Parallel Processing
Parallel processing involves performing multiple computations at the same time. Instead of relying entirely on one processing unit to perform every operation sequentially, a system can use multiple processing elements to work on different parts of a problem.
Parallel processing is particularly useful for workloads that can be divided into independent or partially independent tasks.
Flynn's Taxonomy
Flynn's taxonomy classifies computer architectures according to the number of instruction streams and data streams they can process.
- SISD (Single Instruction, Single Data): A single instruction stream operates on a single data stream.
- SIMD (Single Instruction, Multiple Data): The same instruction is applied to multiple data elements.
- MISD (Multiple Instruction, Single Data): Multiple instruction streams operate on a single data stream. This category is uncommon in general-purpose computing.
- MIMD (Multiple Instruction, Multiple Data): Multiple processing units can execute different instructions on different data.
Examples of Parallel Processing Systems
- Vector Processors: Perform operations on groups or vectors of data.
- Array Processors: Use multiple processing elements to perform operations on data elements in parallel.
- Multiprocessor Systems: Use multiple processors or processing cores to execute tasks concurrently.
- Distributed Systems: Use multiple networked computers, each with its own processing and memory resources, to work together on a larger task.
Multiprocessor Systems
A multiprocessor system contains two or more processing units that can execute instructions concurrently. Depending on the design, processors may share memory or communicate through separate local memories.
Shared Memory and Distributed Memory
| Shared Memory Systems | Distributed Memory Systems |
|---|---|
| Processors access a shared memory space | Each processing unit has its own local memory |
| Processors can communicate through shared memory | Processors commonly communicate through message passing |
| Programming can be simpler for some applications | Can provide good scalability for suitable workloads |
| UMA and NUMA are examples of shared-memory organizations | Common in cluster and distributed computing environments |
UMA and NUMA
In a Uniform Memory Access (UMA) system, processors generally have similar access time to shared memory. In a Non-Uniform Memory Access (NUMA) system, the time required to access memory can depend on which processor and memory location are involved.
Interconnection Networks
- Bus: A relatively simple communication structure, although bandwidth and scalability can become limitations as the number of processors increases.
- Crossbar Switch: Provides multiple possible connections between processors and memory, but requires more hardware and can be expensive.
- Multistage Interconnection Network: Uses multiple switching stages to provide a balance between connectivity, cost, and scalability.
Common Mistakes Students Make
Computer Architecture contains many terms that look similar at first. Understanding the difference between them is more useful than simply memorising definitions.
- Architecture vs Organization: Do not treat these terms as exactly the same. Architecture describes programmer-visible behavior, while organization focuses more on implementation.
- Cache vs RAM: Cache is smaller and generally faster than main memory. It is designed to reduce the time required to obtain frequently used data.
- PC vs IR: The Program Counter identifies the next instruction to fetch, while the Instruction Register holds the instruction currently being processed.
- Data Hazard vs Control Hazard: A data hazard is related to dependencies between instructions, whereas a control hazard is related to changes in program flow such as branches.
- DMA: DMA does not mean that the CPU disappears from the transfer process. Instead, it reduces the CPU's involvement in transferring individual data items.
Computer Architecture: Quick Revision
Computer architecture helps us understand how a computer system is designed and how its major components work together. The CPU executes instructions using units such as the control unit, ALU, and registers. Memory hierarchy provides different levels of storage to balance speed, capacity, and cost.
Instruction sets define the operations supported by a processor, while addressing modes describe how operands are located. Pipelining improves instruction throughput by overlapping execution stages, although hazards can reduce the expected performance. Cache memory improves access speed by keeping frequently used information close to the processor.
I/O organization explains how processors communicate with external devices, while parallel and multiprocessor architectures allow multiple processing activities to occur concurrently.
Practice Questions
Try answering these questions without looking at the explanations above. They are useful for checking whether you understand the concepts rather than simply recognising the definitions.
- What is the main difference between computer architecture and computer organization?
- How does Von Neumann architecture differ from Harvard architecture?
- What are the main components of a CPU?
- What is the purpose of the Program Counter?
- What is an Instruction Set Architecture?
- What is meant by an addressing mode?
- What are structural, data, and control hazards in a pipeline?
- Why is cache memory used between the CPU and main memory?
- What is the difference between temporal and spatial locality?
- How does DMA reduce CPU involvement in I/O operations?
- What are SISD, SIMD, MISD, and MIMD?
- What is the difference between UMA and NUMA?
Conclusion
Computer Architecture is one of the fundamental subjects in Computer Science because it connects software instructions with the hardware that executes them. Concepts such as CPU organization, instruction sets, addressing modes, memory hierarchy, cache, pipelining, I/O, and parallel processing provide the foundation for understanding how modern computer systems work.
For examination preparation, it is useful to learn the basic definitions first and then practise comparing related concepts. Drawing simple diagrams, working through instruction and memory examples, and solving numerical questions on topics such as cache and performance can make these concepts easier to remember.